Demonstration System for an Ultra-Low-Power Video Coder and Decoder

A digital system showcasing two custom video processing chips was designed and implemented. The custom chips perform a forward and inverse discrete cosine transform (DCT) operation using only milliwatts of power. This work presents a hardware-based demonstration system for this chipset that captures and buffers full-motion video data, routes the data through the DCT and inverse DCT devices, and displays the resulting video stream on an LCD in real-time. This demonstration system is implemented with off-the-shelf components, including an NTSC video decoder, RAM and ROM memories, programmable logic devices, and a LCD. Control logic written in VHDL handles the flow of real-time video data through the system, coefficient quantization, synchronization signals for the LCD, and an I2C serial bus interface. The system is contained on a single printed circuit board for simple, portable demonstrations. This system not only demonstrates the functionality and low power consumption of the DCT chipset with arbitrary real-time video data, but it also demonstrates direct, hardware-based applications of the most popular design concepts from undergraduate Electrical Engineering and Compute Science courses, including modularity and abstraction, top-down design, and facilitated testing and debugging. Thesis Supervisor: Anantha Chandrakasan Title: Associate Professor of Electrical Engineering and Computer Science